AXEL — Assembler for a Custom 32-Bit GPU ISA

Project Overview

AXEL is the assembler layer for the 32-Bit Tiny GPU. It turns kernel descriptions into 32-bit encoded instruction words and writes them into .hex files, which the cocotb program-memory model loads and the GPU fetches during simulation. It is deliberately split into two layers. The AXEL API layer exposes readable functions — axel_add, axel_ldr, axel_brnzp, axel_sync, axel_ret — so a kernel reads as intent rather than as bit fields. Beneath it, the gpu_asm layer does the actual encoding, packing opcode, register and immediate fields into the four instruction formats the ISA defines: R-type for register ALU operations, I-type for loads, stores and immediates, B-type for the SIMT branch, and N-type for NOP, RET and SYNC. That separation is the point. The API layer can stay stable and readable while the encoder absorbs ISA changes, and every encoding rule lives in exactly one place — so an opcode renumbering is a single-file change rather than a hunt through kernel source. AXEL is the lowest layer of a three-part toolchain: it sits beneath the axelcc C compiler and targets the 32-Bit Tiny GPU.